|Traditional speedup curve of Amdahl's law no longer applies to computer system performance. All the recent high-performance designs of Intel, IBM, and Sun rely on multi-core technology. This technical shift from ILP (instruction-level parallelism) to TLP (thread-level parallelism) will reshape the design of future microprocessors. In this course, we will cover both ILP and TLP techniques. The topics we cover include adaptive dynamic branch prediction, high-bandwidth instruction fetch, dynamic scheduling, multiple issue, speculation, multithreading, symmetric multiprocessors, distributed shared memory multiprocessors, synchronization and consistency, and cache and memory hierarchy designs.|
1. Lecture Note 1 was updated on March 2.
2. Lecture Note 1 was updated again on March 5.
3. Lecture Note 1 was updated again on March 6.
4. Lecture Note 2 was updated on March 12.
5. Lecture Note 3 was updated on March 12.
6. Reading List 1 was updated on March 13.
7. Lecture Note 2 was updated again on March 20.
8. Lecture Note 4 was updated on March 26.
9. Lecture Note 5 was updated on March 31.
10. Lecture Note 6 was updated on April 8.
11. Lecture Note 7 was updated on April 17.
12. Lecture Note 8 was updated on May 1.
13. Lecture Note 9 was updated on May 7.
14. Lecture Note 9 was updated again on May 14.
※ 강의 시간(16:00 으로 최종 변경되었습니다.)
강의 장소(생명과학관 동관 104호로 최종 변경되었습니다.)
※ 5월 22일 수업은 15:30 으로 변경되었습니다.
※ 기말고사 일정 : 6월 19일(월) 16:00~18:30(생물학과 시험 스케쥴 상 15:30 시작 불가능) .
※ 6월 12일(월) 수업은 6월 15일 (목) 오전 9시로 변경되었으며 수업장소는 공학관 448호 입니다. 논문 발표 대상자들은 발표 논문을 하나씩 더 준비해주시기 바랍니다.
※ 선정된 논문 List
2. Future Vector Microprocessor Extensions for Data Aggregations
3. Back to the Future : Leveraging Belady's Algorithm for Improved Cache Replacement
4. APRES : improving cache efficiency by exploiting load characteristics on GPUs
2. SABRes Atomic Object Reads for In-Memory Rack-Scale Computing
3. pTask : A Smart Prefetching Scheme for OS Intensive Applications
4. Towards Efficient Server Architecture for Virtualized Network Function Deployment_Implications
5. Path Confidence based Lookahead Prefetching
Qos Guarantee(Arizona State University)
2. Energy-Efficient Address Translation A Graph-Based Program Representation for Analyzing
Hardware Specialization Approaches
3. Predicting the Memory Bandwidth and Optimal Core Allocations for Multi-threaded Applica-
1. Doppelganger: A Cache for Approximate Computing
1. A VariableWarp Size Architecture
1. Msacar : Speeding up GPU Warps by Reducing Memory Pitstops
▣ Lecture slide
▣ Reading List